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Creators/Authors contains: "Jacobberger, Robert_M"

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  1. The synthesis of functional graphene nanostructures on Ge(001) provides an attractive route toward integrating graphene-based electronic devices onto complementary metal oxide semiconductor-compatible platforms. In this study, we leverage the phenomenon of the anisotropic growth of graphene nanoribbons from rationally placed graphene nanoseeds and their rotational self-alignment during chemical vapor deposition to synthesize mesoscale graphene nanomeshes over areas spanning several hundred square micrometers. Lithographically patterned nanoseeds are defined on a Ge(001) surface at pitches ranging from 50 to 100 nm, which serve as starting sites for subsequent nanoribbon growth. Rotational self-alignment of the nanoseeds followed by anisotropic growth kinetics causes the resulting nanoribbons to be oriented along each of the equivalent, orthogonal Ge⟨110⟩ directions with equal probability. As the nanoribbons grow, they fuse, creating a continuous nanomesh. In contrast to nanomesh synthesis via top-down approaches, this technique yields nanomeshes with atomically faceted edges and covalently bonded junctions, which are important for maximizing charge transport properties. Additionally, we simulate the electrical characteristics of nanomeshes synthesized from different initial nanoseed-sizes, size-polydispersities, pitches, and device channel lengths to identify a parameter-space for acceptable on/off ratios and on-conductance in semiconductor electronics. The simulations show that decreasing seed diameter and pitch are critical to increasing nanomesh on/off ratio and on-conductance, respectively. With further refinements in lithography, nanomeshes obtained via seeded synthesis and anisotropic growth are likely to have superior electronic properties with tremendous potential in a multitude of applications, such as radio frequency communications, sensing, thin-film electronics, and plasmonics. 
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  2. Abstract To exploit their charge transport properties in transistors, semiconducting carbon nanotubes must be assembled into aligned arrays comprised of individualized nanotubes at optimal packing densities. However, achieving this control on the wafer‐scale is challenging. Here, solution‐based shear in substrate‐wide, confined channels is investigated to deposit continuous films of well‐aligned, individualized, semiconducting nanotubes. Polymer‐wrapped nanotubes in organic ink are forced through sub‐mm tall channels, generating shear up to 10 000 s−1uniformly aligning nanotubes across substrates. The ink volume and concentration, channel height, and shear rate dependencies are elucidated. Optimized conditions enable alignment within a ±32° window, at 50 nanotubes µm−1, on 10 × 10 cm2substrates. Transistors (channel length of 1–5 µm) are fabricated parallel and perpendicular to the alignment. The parallel transistors perform with 7× faster charge carrier mobility (101 and 49 cm2V−1s−1assuming array and parallel‐plate capacitances, respectively) with high on/off ratio of 105. The spatial uniformity varies ±10% in density, ±2° in alignment, and ±7% in mobility. Deposition occurs within seconds per wafer, and further substrate scaling is viable. Compared to random networks, aligned nanotube films promise to be a superior platform for applications including sensors, flexible/stretchable electronics, and light emitting and harvesting devices. 
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